My path so far as a timing diagram: degree stages, each paper, each tapeout, and each round of the AI Hardware Attack Challenge. Hover or tap a pulse for details.
I study how large language models can make hardware design more accessible, and hardware security more practical.
I am a Ph.D. candidate in Electrical and Computer Engineering at NYU Tandon, advised by Prof. Ramesh Karri. I primarily research digital hardware design and hardware security, with a focus on the implications of generative AI on those fields. In Chip-Chat, we used GPT-4 to design and write the Verilog for a microprocessor that we then taped out, and a co-processor designed the same way won first place in Efabless's AI-generated silicon design challenge. I also co-founded the AI Hardware Attack Challenge at CSAW, where student teams use generative AI to attack open-source hardware. Before my Ph.D., I completed my B.S. and M.S. at the Rochester Institute of Technology and then worked at the Johns Hopkins University Applied Physics Laboratory in hardware design.
Research
The Implications of Generative AI for Hardware Design and Security
Ph.D. dissertation, advised by Prof. Ramesh Karri. Advanced to candidacy August 2026; expected defense by May 2027.
LLMs for hardware design
In Chip-Chat, a hardware engineer and GPT-4 co-designed an 8-bit microprocessor through conversation, and the design went to tapeout. Since then I've worked on closing that loop automatically by feeding EDA tool output back to the model, and on measuring where LLMs help and where they fall short in hardware design and test. My recent focus in this area has been on more efficiently using LLMs in the hardware design flow.
Papers:
LLMs implications in hardware security
If LLMs can help design hardware, they can help attack it. Through the AI Hardware Attack Challenge, I study how teams use generative AI to plant Trojans and exploitable bugs in real open-source designs, and what that means for verification tools and model safeguards. Other ongoing works focus on using LLMs for security analysis of industry-scale designs.
Papers:
Securing additive manufacturing
A 3D printer's control system is a hardware attack surface, too. I designed the OffRAMPS board as an FPGA-based intermediary that lets us observe and modify a printer's control signals to study attacks and defenses. In SCREAM we work to analyze secure channels for evaluating prints in real time.
An accumulator-based microprocessor co-designed in conversation with GPT-4, which wrote its Verilog. A set of benchmarking circuits developed by GPT-4 using tool-based feedback. Sent to tapeout on a SkyWater 130 nm shuttle in 2023.
Papers:
QTCore-C1 co-processor
A co-processor for predictable-timing I/O state machines, designed with the Chip-Chat method. It won first place in Efabless's AI Generated Open-Source Silicon Design Challenge and was fabricated on a chipIgnite shuttle.
First place, Efabless AI design challenge, 2023
NYU OffRAMPS PCB
An FPGA-based intermediary for evaluating hardware attacks and defenses on FFF 3D printers. It was used to both replicate existing 3D-printer hardware Trojans and detect bootloader Trojans proposed in Hack3D.
Paper:
AI Hardware Attack Challenge
Co-founder (with Hammond Pearce) and global lead, 2023–present
Designer and lead for a competition at CSAW, NYU's student-run cybersecurity event, and recent additional conferences, in which student teams use generative AI to insert hardware Trojans and other exploitable vulnerabilities into open-source designs such as OpenTitan, RISC-V processors, and cryptographic accelerators. Teams work through a series of remote challenges, and finalists advance to a final round in person.
Six editions since 2023, with 82 teams in total.
Publishes each year's challenge designs and materials on GitHub.
Supports open-source hardware and software through use of open-source tooling, targets, and requirements that competing teams keep their submissions open and accessible.
Analyzed what teams built in : two undergraduate teams with little chip design or security background produced vulnerabilities rated medium to high severity.
Editions
Year
Challenge
Teams
2026
AI Hardware Attack Challenge
2026
AI Hardware Attack Challenge @ DAC
2026
HOST Hardware Hacking Competition -- Red & Blue Team
Tutorials: LLMs for EDATutorials at DATE 2024 and the IEEE Test Spring School 2024, and a short course at BCICTS 2026. Hands-on materials on GitHub.
2024–2026
Instructor of record, Introduction to Hardware Security
Graduate special topics course, 15 studentsNYU
Spring 2024
Teaching assistant, NYU
Graduate: Advanced Hardware DesignUndergraduate: Digital Logic and State Machine Design; CE Design Projects (Senior Capstone)
2022–present
Laboratory instructor, Digital System Design II
Rochester Institute of Technology
2019–2020
Curriculum development assistant, Digital System Design II
Developed new labs for the full course to match a new curriculum built around designing a MIPS processor from scratch in VHDL, and added lab exercises on crossing clock domains.Rochester Institute of Technology
2017, 2018
Teaching assistant, Rochester Institute of Technology
Graduate: Hardware and Software Design for Cryptographic Applications; Reconfigurable ComputingUndergraduate: Interface and Digital Electronics; Digital System Design I and II
2016–2020
Students mentored
Siddh Javeri, M.S. in Computer Engineering, NYU
Summer research through the TREx program
2026
Thinh Nguyen, M.S. in Computer Engineering, NYU
Summer research through the TREx program
2026
Kahlia Gronthos, M.S. in Computer Engineering, NYU
M.S. capstone project
2025
Youssof Saleh, B.S. in Computer Engineering
NYU UGSRP summer research internship
2025
Helin Mazi, B.S. in Computer Engineering
NYU UGSRP summer research internship
2025
Fatima Farooq, B.S. in Computer Engineering
NYU UGSRP summer research internship
2024
Abay Oralov, B.S. in Computer Engineering
NYU UGSRP summer research internship
2024
Talks and tutorials
Generative AI for Digital Hardware Design: Conversation Through Automation
Short course, IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)
Oct 2026
AI Hardware Attack Challenge
GREAT Workshop, IEEE/ACM Design Automation Conference (DAC)
